1. Field of the Invention
The present invention relates to a semiconductor device including a vertical metal oxide semiconductor (MOS) transistor having a gate electrode and a gate insulating film which are buried in a semiconductor substrate, and a method of manufacturing the same. In addition, the present invention relates to a solid-state image pickup element including a vertical MOS transistor in a pixel portion.
2. Description of the Related Art
In a solid-state image pickup element, a high integration level for circuits is promoted for enhancement of a sensitivity, and thus there are proposed various kinds of techniques for ensuring an area of a photodiode.
For example, a structure is proposed in which a trench is formed on a photodiode formed on a back surface side of a silicon substrate, and a transfer gate is provided inside the trench, thereby forming a vertical MOS transistor in the trench. This technique, for example, is described in Japanese Patent Laid-Open No. 2005-223084.
In the vertical MOS transistor formed in the trench, an electrode material of a gate electrode is buried in the trench which is covered with a gate insulating film. Thus, a sidewall portion and a bottom surface portion of the trench compose a channel portion.
With this structure, the sensitivity can be enhanced because an area of a photodiode can be increased as compared with the case of a structure in which a photodiode and a transfer gate are formed individually on a front surface side of the silicon substrate.